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TSMC and Academic Partners Achieve Breakthrough in 2D Semiconductor Interface Technology
Electronic Technology · Semiconductors · cnyes · 2026-08-06
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A collaborative research team supported by the NSTC and TSMC has developed a high-performance 2D MoS2 transistor, overcoming critical interface challenges for next-gen chips.
What Happened
Technical Milestone: A research team from NYCU and Academia Sinica, supported by the NSTC and in collaboration with TSMC, has successfully addressed long-standing interface challenges in 2D semiconductors. Their breakthrough, involving a high-performance monolayer molybdenum disulfide (MoS2) top-gate transistor, was recently published in the prestigious journal Nature Electronics.
Industry Context: As traditional silicon-based semiconductor technology approaches its physical limits, the industry is searching for materials to sustain Moore's Law. 2D semiconductors, characterized by their atomic-level thickness, are considered essential for enabling further chip miniaturization and enhancing power efficiency in the post-silicon era.
Innovative Engineering: The team utilized ultra-high vacuum technology and epitaxial interface engineering to design an alumina layer just 0.42 nanometers thick. This innovation significantly improves the quality between the semiconductor and the dielectric layer, effectively reducing electron transport resistance while maintaining an ultra-thin profile.
Future Outlook: Professor Chang Wen-hao emphasized that this platform technology can be widely applied to various 2D materials and integrated into existing manufacturing processes. This achievement underscores Taiwan's competitive edge in next-generation semiconductor research and paves the way for faster, more energy-efficient electronic components.
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